Sony DVS-9000-C User Manual download pdf (Page 30)

1-22

DVS-9000/9000SF

1-8. Checks on Completion of Installation

<LED>

D103, D107 (A-4) :

+1.8 V-1 and 2

+1.8 V-1 and 2 power supply status indication.

Lit when the +1.8 V-1 and 2 power are supplied.

D203 (A-4) :

+3.3 V

+3.3 V power supply status indication.

Lit when the +3.3 V power is supplied.

D207 (A-3) :

+12 V

+12 V power supply status indication.

Lit when the +12 V power is supplied.

If this LED does not light, the fuse may have blown.

D1000 (A-11) : CONFIG. ERROR status LED

Indicates the configuration error of the FPGA.

If this LED lit, the FPGA can possibly be working incor-

rectly.

4. OUT-26 board (DVS-9000/9000SF/BKDS-9160)

A side/Component side

D1001 (A-10) : DLL UNLOCK status LED

Indicates lock/unlock of the DLL (Delay Locked Loop) in

the FPGA.

If this LED lit, the DLL can possibly be unlocked.

D1002 (A-10) : PLL UNLOCK status LED

Indicates lock/unlock of the PLL (Phase Locked Loop) in

the FPGA.

If this LED lit, the PLL can possibly be unlocked.

D1003, D1004, D1005 (A-10) : C2, C1 and C0 status LED

Indicates the status of CPU on the circuit board.

S200 (A-9) : OUT-CPU reset switch

Pressing this switch initializes the CPU on the OUT-26

board.

TP201

D207

TP200

D203

TP100

D103

TP101

D107

AB C DE F GH J K L MN P R

S200

S800

SL1700

CN1700

D1005

D1004

D1003

D1001

D1002

D1000

SL1701

SL1702

CN900

E11

E10

TP900

TP402 TP400

TP401 TP403

TP407

TP406

TP408

TP409

TP901

TP902

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Sony DVS-9000-C User Manual Page 30

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